Comments on "Handling soft modules in general nonslicing floorplan using Lagrangian relaxation"

Handling Soft Modules in General Non-sli ing Floorplan using Lagrangian Relaxation

On extending slicing floorplan to handle L/T-shaped modules andabutment constraints

In floorplanning, it is common that a designer wants to have certain modules abutting with one another in the final packing. The problem of controlling the relative positions of an arbitrary number of modules in floorplan design is nontrivial. Slicing floorplan has an advantageous feature in which the topological structure of the packing can be found without knowing the module dimensions. This ...

Non Slicing Floorplan Representations in VLSI Floorplanning: A Summary

Floorplan representation is a fundamental issue in designing a VLSI floorplanning algorithm as the representation has a great impact on the feasibility and complexity of floorplan designs. This survey paper gives an up-to-date account on various nonslicing floorplan representations in VLSI floorplanning.

Corner sequence - a P-admissible floorplan representation with a worst case linear-time packing scheme

Floorplanning/placement allocates a set of modules into a chip so that no two modules overlap and some specified objective is optimized. To facilitate floorplanning/placement, we need to develop an efficient and effective representation to model the geometric relationship among modules. In this paper, we present a P-admissible representation, called corner sequence (CS), for nonslicing floorpla...

A linear programming-based algorithm for floorplanning in VLSI design

In this paper, we consider a floorplanning problem in the physical design of very large scale integration. We focus on the problem of placing a set of blocks (modules) on a chip with the objective of minimizing area of the chip as well as total wire length. The blocks have different areas and their shapes are either fixed (predetermined) or flexible (to be determined). We use the sequence-pair ...